Allen-Bradley 1770-M11 User Manual Page 1

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Publication 1747-2.39
SLC 500
Chassis–Based Processors
(Catalog Numbers 1747–L511, –L514, –
L524, –L531, –L532, –L541, –L542, –L543, –
L551, –L552, –L553)
Product Data
The SLC 500 product line allows you to build just the right control system
to meet your needs.
We offer four chassis sizes, five power
supplies, eleven processors, and a wide variety of I/O modules.
Additionally, we offer flexible communication options and
programming and operator interface options.
The SLC 500 family of programmable controllers have expanded to meet
a broader range of applications.
From high–speed packaging and
material handling applications to advanced process control
applications, Allen–Bradley offers the right processor for your
job.
The SLC 5/03™ , SLC 5/04 and SLC 5/05™ processors offer
features previously found only on high–level Plus.
The SLC 500
processors provide a broad range of communication options,
including DH–485, RS–232, DH+, and Ethernet. Increased
instruction support with ASCII, floating point math, and indirect
addressing allows you to expand your application’s capabilities.
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Summary of Contents

Page 1 - Chassis–Based Processors

Publication 1747-2.39SLC 500™ Chassis–Based Processors(Catalog Numbers 1747–L511, –L514, –L524, –L531, –L532, –L541, –L542, –L543, –L551, –L

Page 2 - Features and Benefits

10 SLC 500™ Chassis–Based Processors Publication 1747-2.39The table below summarizes the SLC 500 processor channel connections.Protocol OptionsEther

Page 3 - Processors

SLC 500™ Chassis–Based Processors 11 Publication 1747-2.39Data Highway Plus (DH+) ProtocolThe Data Highway Plus protocol is used by the PLC–5

Page 4 - Publication 1747-2.39

12 SLC 500™ Chassis–Based Processors Publication 1747-2.39System Protection OptionsThe SLC 500 family of processors offer a number of hardware and s

Page 5

SLC 500™ Chassis–Based Processors 13 Publication 1747-2.39I/O UsagesThe SLC 500 family of processors support a variety of I/O modules, allowi

Page 6

14 SLC 500™ Chassis–Based Processors Publication 1747-2.39Programming InstructionsThe following programming instructions are used with the SLC 500 p

Page 7 - System Throughput

SLC 500™ Chassis–Based Processors 15 Publication 1747-2.39Comparison InstructionsInstruction Mnemonic and NameExecution Times (µs) Floating P

Page 8 - Interrupt Subroutines

16 SLC 500™ Chassis–Based Processors Publication 1747-2.39Math InstructionsInstruction Mnemonic and NameaExecution Times (µs) Floating Point (µs) b

Page 9 - Communication Options

SLC 500™ Chassis–Based Processors 17 Publication 1747-2.39SWP Swap ——24 + 13.09 per word22.6 + 12.13 per wordSwaps the low and high bytes of

Page 10 - Protocol Options

18 SLC 500™ Chassis–Based Processors Publication 1747-2.39Data Handling InstructionsInstruction Mnemonic and NameExecution Times (µs) Floating Point

Page 11

SLC 500™ Chassis–Based Processors 19 Publication 1747-2.39Program Flow InstructionsInstruction Mnemonic and NameExecution Times (µs)Function

Page 12 - System Protection

2 SLC 500™ Chassis–Based Processors Publication 1747-2.39Features and BenefitsSupports user memory sizes from 1K to 64K. By offering a wide range of

Page 13 - I/O Usages

20 SLC 500™ Chassis–Based Processors Publication 1747-2.39Application Specific InstructionsCommunication InstructionsProportional Integral Derivativ

Page 14 - Programming Instructions

SLC 500™ Chassis–Based Processors 21 Publication 1747-2.39ASCII InstructionsInstruction Mnemonic and NameaExecution Times (µs)Function - Outp

Page 15 - Comparison Instructions

22 SLC 500™ Chassis–Based Processors Publication 1747-2.39Interrupt Routine InstructionsIndirect AddressingThe following sections describe how indir

Page 16 - Math Instructions

SLC 500™ Chassis–Based Processors 23 Publication 1747-2.39Execution Times for Word–Level Indirect AddressesFor most types of instructions tha

Page 17

24 SLC 500™ Chassis–Based Processors Publication 1747-2.39Execution Times for Bit–Level Indirect AddressesIndirect bit addresses are based on the fo

Page 18 - Data Handling Instructions

SLC 500™ Chassis–Based Processors 25 Publication 1747-2.39Instruction Execution TimesExecution Time Example - Bit Instruction Using an Indire

Page 19 - Program Flow Instructions

26 SLC 500™ Chassis–Based Processors Publication 1747-2.39The following table summarizes the communication options for the SLC 500 processor family.

Page 20 - Communication Instructions

SLC 500™ Chassis–Based Processors 27 Publication 1747-2.39The following table summarizes the general specifications for the SLC 500 processor

Page 21 - ASCII Instructions

Publication 1747-2.39 - December 1997 Supersedes Publication 1747-2.39 - December 1995 1998 Rockwell International. All Rights Reserved. Printed in U

Page 22 - Indirect Addressing

SLC 500™ Chassis–Based Processors 3 Publication 1747-2.39Supports a host of third–party products through the Allen–Bradley Encompass Program.

Page 23

4 SLC 500™ Chassis–Based Processors Publication 1747-2.39SLC 5/03™ Processor (Catalog # 1747–L531 and 1747–L532)The SLC 5/03 processor significantly

Page 24 - Indirect Address

SLC 500™ Chassis–Based Processors 5 Publication 1747-2.39SLC 5/04™ Processor (Catalog # 1747–L541, –L542, or –L543)The SLC 5/04 processor pro

Page 25 - Specifications

6 SLC 500™ Chassis–Based Processors Publication 1747-2.39SLC 5/05™ Processor (Catalog # 1747–L551, –L552, or –L553)The SLC 5/05 processor provides i

Page 26

SLC 500™ Chassis–Based Processors 7 Publication 1747-2.39System ThroughputWhen your application requires high–speed processing it requires mo

Page 27

8 SLC 500™ Chassis–Based Processors Publication 1747-2.39Interrupt SubroutinesThe following interrupt subroutines allow you to provide predetermined

Page 28 - Allen-Bradley Support

SLC 500™ Chassis–Based Processors 9 Publication 1747-2.39Communication OptionsThe SLC 500 processors support different types of communication

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